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SPT5140 查看數據表(PDF) - Cadeka Microcircuits LLC.

零件编号
产品描述 (功能)
比赛名单
SPT5140
CADEKA
Cadeka Microcircuits LLC. CADEKA
SPT5140 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Figure 2 – Typical Interface Circuit
Video
Control
Inputs
FT
FH
Blank
BRT
Sync
Video
Data
Inputs
D0 (LSB)
D1
D2
D3
D4
D5
D6
D7 (MSB)
R1
1 k
Clock
R2
1 k
CONV
CONV
ISet
V+ ( ISet * )
LM113/313
1k
2 k
Ref In
V–
.01 µF
4 to 15
Decode
Ref
Buffer
–5.2 V
Optional External
Reference
Remove J1 For
External Reference
FB
*An external reference can be used or the reference from
Ref Out can drive three SPT5140s.
4
4
Bandgap
Reference
VCC
VEE
.01 µF
10 µF
–5.2 V
Out–
R3
50/75
Out+
Video Monitor
50/75 COAX
R4
50/75
NOTES:
1. V– = –1.2 V (typical) for LM113 or VBG
2. V+ = –1.2 V
3. ISet = αT(RV1++R2); typ = 1.105 mA
4. RL = R3 / / R4
[ ] 5.
VOUT = K
255–Digital
255
Input
Code
x
ISet
RL +
[K1 x ISet x RL(bright)]
6. VSync = (K x ISet x RL) + (K2 x ISet x RL)
K = 15.8069
K1 = 1.7617
K2 = 10.0392
7. FB = Ferrite bead, Fair-rite pin 217430011
or equivalent.
8. All reference resistors 1/8 W 1% metal
film, power supply decoupling 50 V
ceramic disc
9. x = ECL Termination
10.
= VCC = AGND
11. See figure 9 for detail on Ref Buffer.
12. = DGND (digital input drivers).
OUTPUT CONSIDERATIONS
The analog outputs are designed to directly drive a dou-
bly terminated 50 or 75 ohm load transmission system as
shown. The source impedances of the SPT5140 outputs
are high impedance current sinks. The load impedance
(RL) must be 25 or 37.5 ohms to attain standard RS-343-
A video levels. Any deviation from this impedance will
affect the resulting video output levels proportionally. As
with the data interface, it is important that the analog
transmission lines have matched impedance throughout,
including connectors and transitions between printed
wiring and coaxial cable. The combination of matched
source termination resistor RS and load terminator RL
minimizes reflections of both forward and reverse travel-
ing waves in the analog transmission system. The return
path for analog output current is VCC, which is connected
to the source termination resistor RS.
POWER CONSIDERATIONS
The SPT5140 operates from a single –5.2 V standard
supply. Proper bypassing of the supplies will augment the
SPT5140’s inherent supply noise rejection characteris-
tics. As shown in figure 2, each supply pin should be by-
passed as close to the device as possible with 0.01 µF
and 10 µF capacitors.
The SPT5140 has two analog (VEE) power supply pins.
Both supply pins should be properly bypassed as men-
tioned previously. This device also has two analog (VCC)
ground pins. Both ground pins should be tied to the
analog ground plane. Power and ground pins must be
connected in all applications. If a +5 V power source is
required, the ground pins (VCC) become the positive sup-
ply pins while the supply pins (VEE) become the ground
pins. The relative polarities of the other input and output
voltages must be maintained.
SPT5140
5
3/28/00

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