CY7C1329_04 查看數據表（PDF） - Cypress Semiconductor
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CY7C1329_04 Datasheet PDF : 15 Pages
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CY7C1329
Switching Waveforms
Write Cycle Timing[14, 15]
CLK
tADS
ADSP
ADSC
ADV
Single Write
tCYC
tADH
tADS
tADH
tADVS
tADVH
Burst Write
tCH
Pipelined Write
tCL ADSP ignored with CE1 inactive
ADSC initiated Write
Unselected
tAS
ADV Must Be Inactive for ADSP Write
ADD
WD1
WD2
tAH
GW
WE
tWH
tWS
tWH
tWS
tCES tCEH
CE1
tCES
CE2
tCEH
CE1 masks ADSP
WD3
Unselected with CE2
CE3
tCES
OE
tCEH
tDH
tDS
Data- High-Z
11aa
In
2a
2b
= UNDEFINED
2c
2d
3a
= DON’T CARE
Notes:
14. WE is the combination of BWE, BW[3:0] and GW to define a Write cycle (see Write Cycle Descriptions table).
15. WDx stands for Write Data to Address X.
High-Z
Document #: 38-05279 Rev. *B
Page 9 of 15
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