SAKC505A-4EM 查看數據表（PDF） - Siemens AG

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SAKC505A-4EM

8-Bit CMOS Microcontroller

Siemens AG 

C505 / C505C

C505A / C505CA

Reset and System Clock

The reset input is an active high input at pin RESET. Since the reset is synchronized internally, the

RESET pin must be held high for at least two machine cycles (12 oscillator periods) while the

oscillator is running. A pulldown resistor is internally connected to VSS to allow a power-up reset with

an external capacitor only. An automatic reset can be obtained when VCC is applied by connecting

the RESET pin to VCC via a capacitor. Figure 6 shows the possible reset circuitries.

a)

VCC

C505

C505C

+

C505A

C505CA

RESET

b)

C505

C505C

C505A

C505CA

&

RESET

c)

VCC

VCC

C505

C505C

+

C505A

C505CA

RESET

Figure 6

Reset Circuitries

MCS03633

Semiconductor Group

16

1997-12-01

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