CY7C146(2005) 查看數據表（PDF） - Cypress Semiconductor
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CY7C146 Datasheet PDF : 18 Pages
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CY7C132/CY7C136
CY7C142/CY7C146
Switching Characteristics Over the Operating Range (Speeds -35, -45, -55) (continued)[5, 10]
Parameter
Write Cycle[14]
Description
tWC
Write Cycle Time
tSCE
CE LOW to Write End
tAW
Address Set-up to Write End
tHA
Address Hold from Write End
tSA
Address Set-up to Write Start
tPWE
R/W Pulse Width
tSD
Data Set-up to Write End
tHD
tHZWE
tLZWE
Data Hold from Write End
R/W LOW to High Z [9]
R/W HIGH to Low Z [9]
Busy/Interrupt Timing
tBLA
BUSY LOW from Address Match
tBHA
BUSY HIGH from Address Mismatch[15]
tBLC
tBHC
BUSY LOW from CE LOW
BUSY HIGH from CE HIGH[15]
tPS
Port Set Up for Priority
tWB
R/W LOW after BUSY LOW[16]
tWH
R/W HIGH after BUSY HIGH
tBDD
BUSY HIGH to Valid Data
tDDD
Write Data Valid to Read Data Valid
tWDD
Write Pulse to Data Delay
Interrupt Timing[18]
tWINS
tEINS
tINS
tOINR
tEINR
tINR
R/W to INTERRUPT Set Time
CE to INTERRUPT Set Time
Address to INTERRUPT Set Time
OE to INTERRUPT Reset Time[15]
CE to INTERRUPT Reset Time[15]
Address to INTERRUPT Reset Time[15]
7C132-35
7C136-35
7C142-35
7C146-35
7C132-45
7C136-45
7C142-45
7C146-45
7C132-55
7C136-55
7C142-55
7C146-55
Min. Max. Min. Max. Min. Max. Unit
35
45
55
ns
30
35
40
ns
30
35
40
ns
2
2
2
ns
0
0
0
ns
25
30
30
ns
15
20
20
ns
0
0
0
ns
20
20
25
ns
0
0
0
ns
20
25
30
ns
20
25
30
ns
20
25
30
ns
20
25
30
ns
5
5
5
ns
0
0
0
ns
30
35
35
ns
35
45
45
ns
Note 17
Note 17
Note 17 ns
Note 17
Note 17
Note 17 ns
25
35
45
ns
25
35
45
ns
25
35
45
ns
25
35
45
ns
25
35
45
ns
25
35
45
ns
Document #: 38-06031 Rev. *C
Page 6 of 18
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