CXL5513M 查看數據表（PDF） - Sony Semiconductor
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CXL5513M Datasheet PDF : 9 Pages
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CXL5513M/P
NOTE
1 This is the IC supply current value during clock and signal input.
2 GL is the output gain of OUT pin when a 500 mVp-p, 200 kHz sine wave is fed to IN pin.
OUT pin output voltage [mVp-p]
GL = 20 log
[dB]
500 [mVp-p]
3 Indicates the dissipation at 3.58 MHz in relation to 200 kHz. From the output voltage at OUT pin when a
150 mVp-p, 200 kHz sine wave is fed to IN pin, and from the output voltage at OUT pin when a 150 mVp-p,
3.58 MHz sine wave is fed to the same, calculation is made according to the following formula.
OUT pin output voltage (3.58 MHz) [mVp-p]
fR = 20 log
[dB]
OUT pin output voltage (200 kHz) [mVp-p]
4 In Fig. below, the differential gain (DG) and the differential phase (DP), are tested with a vector scope
when the 5-staircase wave is fed.
143mV
1H 63.56µS
357mV
500mV
143mV
5 Leakage of internal clock components and related high frequency component to the output signal, during
no signal input, is tested.
Test value
(mVp-p)
—3—
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