CXP508L4 查看數據表（PDF） - Sony Semiconductor

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CXP508L4

CMOS 4-bit Single Chip Microcomputer

Sony Semiconductor 

Fig. 4. Serial transfer timing

SC

tKCY

tKL

tKH

SI

SOA

SOB

tSIK

tKSI

Input data

0.8VDD

0.2VDD

tKSOA

tKSOB

0.8VDD

0.2VDD

Output data

CXP508L4/508L6

0.8VDD

0.2VDD

(3) Others

Item

External interruption high and

low level widths

Reset input low level width

Symbol

tI1H, tI1L

tI2H, tI2L

tRSL

Wake-up input high level width tWPH

Note) tsys = 8/fc

Pin

INT1

INT2

RST

WP

(Ta = –20 to +75°C, VDD = 2.4 to 3.5V, VSS = 0V)

Condition

Min. Max. Unit

During edge detection mode tsys + 0.05

µs

tsys + 0.05

µs

2tsys

µs

STOP mode

500

ns

SLEEP mode

tsys + 0.05

µs

–8–

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