CXP5078 查看數據表（PDF） - Sony Semiconductor

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CXP5078

CMOS 4-bit Single Chip Microcomputer

Sony Semiconductor 

CXP5076/5078

(5) Others

(Ta = –20 to +75°C, VDD = 4.5 to 5.5V, Vss = 0V)

Item

External interruption high and

low level widths

Reset input low level width

Symbol Pin

tI1H, tI1L INT

tRSL

RST

Wake-up input high level width tWPH

WP

Wake-up input low level width tWPL

PA0 to

PA3

Condition

During edge

detection mode

Stop mode

Sleep mode

Stop mode

Sleep mode

Min.

tsys + 0.05

2tsys∗1

500

tsys + 0.05

500

tsys + 0.05

Max.

Unit

µs

µs

ns

µs

ns

µs

Note) tsys in the EXTAL input clock is 8/fc.

tsys in the TEX input clock is 4/fcs.

∗1 For resetting when operating in TEX input clock, hold the low level more than the oscillation stabilizing time

of EXTAL input clock.

tI1L

tI1H

INT

(Rising edge)

0.2VDD

0.8VDD

INT

(Falling edge)

tI1H

tI1L

0.8VDD

Fig. 7. Interruption input timing

tRSL

0.2VDD

RST

0.2VDD

Fig. 8. Reset input timing

tWPH

WP

0.8VDD

Fig. 9. Wake-up input timing

tWPL

PA0 to PA3

0.2VDD

Fig. 10. Wake-up input timing

– 15 –

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