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CXD2312 查看數據表(PDF) - Sony Semiconductor

零件编号
产品描述 (功能)
比赛名单
CXD2312
Sony
Sony Semiconductor Sony
CXD2312 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CXD2312R
Item
SNR
SFDR
Symbol
SNR
SFDR
Conditions
FIN = 100kHz
FIN = 500kHz
FIN = 1MHz
FIN = 3MHz
FIN = 7MHz
FIN = 10MHz
FIN = 100kHz
FIN = 500kHz
FIN = 1MHz
FIN = 3MHz
FIN = 7MHz
FIN = 10MHz
Min. Typ. Max. Unit
53
53
53
dB
51
51
49
68
66
66
dB
62
56
51
Application Circuit 1. Startup calibration + internal auto calibration
4.0V
2.0V
AVDD
4.0V
2.0V
AVSS
Sample & Hold
AVDD
DVDD
AVSS
DVSS
36 35 34 33 32 31 30 29 28 27 26 25
37 TSTR
38 AT
39 VIN
40 NC
41 CAL
42 TS
43 AVSS
44 AVSS
45 DVDD
46 NC
47 NC
48 DVSS
CE 24
OE 23
CLK 22
MINV 21
LINV 20
TESTMODE 19
AVDD 18
SEL 17
DVSS 16
RESET 15
TIN 14
TO 13
1 2 3 4 5 6 7 8 9 10 11 12
AVSS
AVDD
Clock input
AVSS
AVDD
DVSS
is all 0.1µF
Digital output
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
–8–

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