CXD1803AR 查看數據表（PDF） - Sony Semiconductor

零件编号

产品描述 (功能)

比赛名单

CXD1803AR

CD-ROM DECODER

Sony Semiconductor 

CXD1803AQ/AR

Pin Description

Pin No.

Q

R

1

99

2

100

3

1

4

2

5

3

6

4

7

5

8

6

9

7

10

8

11

9

12

10

13

11

14

12

15

13

16

14

17

15

18

16

19

17

20

18

21

19

22

20

23

21

24

22

25

23

26

24

27

25

28

26

29

27

30

28

31

29

32

30

33

31

34

32

Symbol

D0

D1

VDD

GND

D2

D3

D4

D5

GND

D6

D7

XCS

XRD

XWR

GND

XINT

A0

A1

A2

A3

DRAM

A4

TD0

XSRD

XSWR

SD0

SD1

VDD

GND

SD2

SD3

SD4

SD5

SD6

I/O

Description

I/O Sub CPU data bus

I/O Sub CPU data bus

— Power supply (+5 V)

— Ground

I/O Sub CPU data bus

I/O Sub CPU data bus

I/O Sub CPU data bus

I/O Sub CPU data bus

— Ground

I/O Sub CPU data bus

I/O Sub CPU data bus

I

IC select negative logic signal from sub CPU

I

Strobe negative logic signal to read this IC internal register from sub CPU

I

Strobe negative logic signal to write this IC internal register from sub CPU

— Ground

O Interrupt request negative logic signal from IC to sub CPU

I

Sub CPU address

I

Sub CPU address

I

Sub CPU address

I

Sub CPU address

I

Memory type selection signal. High: DRAM, Low: SRAM

I

Sub CPU address

I/O Test input/output

O Strobe negative logic signal to read SCSI controller internal register

O Strobe negative logic signal to write SCSI controller internal register

I/O SCSI controller data bus

I/O SCSI controller data bus

— Power supply (+5 V)

— Ground

I/O SCSI controller data bus

I/O SCSI controller data bus

I/O SCSI controller data bus

I/O SCSI controller data bus

I/O SCSI controller data bus

—3—

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