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ISL8560 查看數據表(PDF) - Renesas Electronics

零件编号
产品描述 (功能)
比赛名单
ISL8560
Renesas
Renesas Electronics Renesas
ISL8560 Datasheet PDF : 17 Pages
First Prev 11 12 13 14 15 16 17
ISL8560
The amplitudes of the different types of voltage excursions can
be approximated by using the formulas in Equation 4:
VESR = ESR Itran
VESL = ESL -d---I--dt--r--ta----n-
VSAG = -C----o---u-L---t-o---u----t-V-----i-In--t-r--–-a---nV---2-o----u---t--
VHUMP = L-C---o--o-u--u--t--t-----I--tV--r--ao---n-u--2-t-
(EQ. 4)
where
Itran = Output Load Current Transient
Cout = Total Output Capacitance
In a typical converter design, the ESR of the output capacitor
bank dominates the transient response. The ESR and the ESL
are typically the major contributing factors in determining the
output capacitance. The number of output capacitors can be
determined by using Equation 5, which relates the ESR and
ESL of the capacitors to the transient load step and the voltage
limit (Vo):
Number of Caps = --E--------S---------L-----------d--------dt------I----t----r----a--------n----V-+---o--E-----S----R----------I--t--r--a---n--
(EQ. 5)
If VSAG and/or VHUMP are found to be too large for the
output voltage limits, then the amount of capacitance may
need to be increased. In this situation, a trade off between
output inductance and output capacitance may be necessary.
The ESL of the capacitors, which is an important parameter in
Equations 4 and 5, is not usually listed in databooks.
Practically, it can be approximated if an impedance vs
frequency curve is given for a specific capacitor (C):
ESL = C--------2-----------1-------f--r--e---s------2-
(EQ. 6)
where fres is the frequency where the lowest impedance
is achieved (resonant frequency).
The ESL of the capacitors becomes a concern when designing
circuits that supply power to loads with high rates of change in
the current.
Output Inductor Selection
The output inductor is selected to meet the output voltage
ripple requirements and minimize the converter’s response
time to the load transient. The inductor value determines the
converter’s ripple current and the ripple voltage is a function of
the ripple current. The ripple voltage and current are
approximated by Equation 7:
I = VIN - VOUT x VOUT
Fs x L
VIN
VOUT = I x ESR
(EQ. 7)
Increasing the value of inductance reduces the ripple current
and voltage. However, the large inductance values reduce the
FN9244 Rev 7.00
September 19, 2008
converter’s response time to a load transient. Use I of
approximately 30% of IOUT is a good compromise.
One of the parameters limiting the converter’s response to a
load transient is the time required to change the inductor
current. Given a sufficiently fast control loop design, the
ISL8560 will provide either 0% or 100% duty cycle in
response to a load transient. The response time is the time
required to slew the inductor current from an initial current
value to the transient current level. During this interval the
difference between the inductor current and the transient
current level must be supplied by the output capacitor.
Minimizing the response time can minimize the output
capacitance required.
The response time to a transient is different for the application
of load and the removal of load. Equation 8 gives the
approximate response time interval for application and removal
of a transient load:
tRISE =
L x ITRAN
VIN - VOUT
tFALL =
L x ITRAN
VOUT
(EQ. 8)
where: ITRAN is the transient load current step, tRISE is the
response time to the application of load, and tFALL is the
response time to the removal of load. The worst case response
time can be either at the application or removal of load. Be
sure to check both of these equations at the minimum and
maximum output levels for the worst case response time.
Rectifier Selection
Current circulates from ground to the junction of the MOSFET
and the inductor when the high-side switch is off. As a
consequence, the polarity of the switching node is negative
with respect to ground. This voltage is approximately -0.5V (a
Schottky diode drop) during the off time. The rectifier's rated
reverse breakdown voltage must be at least equal to the
maximum input voltage, preferably with a 20% derating factor.
The power dissipation is:
PDW
=
IOUT
VD
1
V----V-O---I-U-N---T--
(EQ. 9)
where VD is the voltage of the Schottky diode = 0.5V to 0.7V
Input Capacitor Selection
Use a mix of input bypass capacitors to control the voltage
overshoot across the VIN’s pin. Use small ceramic capacitors
for high frequency decoupling and bulk capacitors to supply the
current needed each time the upper MOSFET turns on. Place
the small ceramic capacitors physically close to the VIN and
PGND pins.
The important parameters for the bulk input capacitance are
the voltage rating and the RMS current rating. For reliable
operation, select bulk capacitors with voltage and current
ratings above the maximum input voltage and largest RMS
current required by the circuit. Their voltage rating should be at
Page 13 of 17

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