HS9-6617RH-Q 查看數據表（PDF） - Intersil
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比赛名单
HS9-6617RH-Q Datasheet PDF : 5 Pages
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Pinouts
24 LEAD CERAMIC DUAL-IN-LINE
(SBDIP)
MIL-STD-1835 CDIP2-T24
TOP VIEW
A7 1
A6 2
A5 3
A4 4
A3 5
A2 6
A1 7
A0 8
Q0 9
Q1 10
Q2 11
GND 12
24 VDD
23 A8
22 A9
21 P
20 G
19 A10
18 E
17 Q7
16 Q6
15 Q5
14 Q4
13 Q3
HS-6617RH
24 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK)
MIL-STD-1835 CDFP4-F24
TOP VIEW
A7
1
24
VDD
A6
2
23
A8
A5
3
22
A9
A4
4
21
P
A3
5
20
G
A2
6
19
A10
A1
7
18
E
A0
8
17
Q7
Q0
9
16
Q6
Q1
10
15
Q5
Q2
11
14
Q4
GND
12
13
Q3
PIN
DESCRIPTION
A
Address Input
Q
Data Output
E
Chip Enable
G
Output Enable
P
Program Enable (P Hardwired to VDD, except during programming)
Functional Diagram
MSB
A10
A9
A8
A7
A6
A5
A4
LSB
P
E
LATCHED
ADDRESS
REGISTER
7A
GATED
ROW
7 A DECODER 128
128 x 128
MATRIX
E
E
16 16 16 16 16 16 16 16
8
GATE COLUMN
DECODER
8
PROGRAMMING, & DATA
E
OUTPUT CONTROL
A4
A4
1 OF 8
Q0 - Q7
G
E
LATCHED ADDRESS
REGISTER
ADDRESS LATCHES AND GATED DECODERS:
LATCH ON FALLING EDGE OF E
GATE ON FALLING EDGE OF G
P = HARDWIRED TO VDD EXCEPT DURING PROGRAMMING
MSB
LSB
A3 A2 A1 A0
TRUTH TABLE
E
G
MODE
0
0
Enabled
0
1
Output Disabled
1
X
Disabled
ALL LINES POSITIVE LOGIC:
ACTIVE HIGH
THREE STATE BUFFERS:
A HIGH
OUTPUT ACTIVE
2
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