WED9LAPC2C16V4BC 查看數據表（PDF） - White Electronic Designs => Micro Semi
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WED9LAPC2C16V4BC Datasheet PDF : 23 Pages
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WED9LAPC2C16V4BC
SDRAM AC CHARACTERISTICS
Parameter
Clock Cycle Time (1)
CL = 3
CL = 2
Clock to valid Output delay (1,2)
Output Data Hold Time (2)
Clock HIGH Pulse Width (3)
Clock LOW Pulse Width (3)
Input Setup Time (3)
Input Hold Time (3)
CLK to Output Low-Z (2)
CLK to Output High-Z
Row Active to Row Active Delay (4)
RAS\ to CAS\ Delay (4)
Row Precharge Time (4)
Row Active Time (4)
Row Cycle Time - Operation (4)
Row Cycle Time - Auto Refresh (4,8)
Last Data in to New Column Address Delay (5)
Last Data in to Row Precharge (5)
Last Data in to Burst Stop (5)
Column Address to Column Address Delay (6)
Number of Valid Output Data (7)
Symbol
tCC
tCC
tSAC
tOH
tCH
tCL
tSS
tSH
tSLZ
tSHZ
tRRD
tRCD
tRP
tRAS
tRC
tRFC
tCDL
tRDL
tBDL
tCCD
Min
Max
Units
8
1000
ns
10
1000
ns
6
ns
2.5
ns
3
ns
3
ns
2
ns
1
ns
1
ns
6
ns
16
ns
20
ns
20
ns
48
10,000
ns
70
ns
70
ns
1
CLK
2
CLK
1
CLK
1
CLK
2
ea
1
ea
NOTES:
1. Parameters depend on programmed CAS latency.
2. If clock rise time is longer than 1ns (trise/2 -0.5)ns should be added to the parameter.
3. Assumed input rise and fall time = 1ns. If trise of tfall are longer than 1ns. [(trise = tfall)/2] - 1ns should
be added to the parameter.
4. The minimum number of clock cycles required is detemined by dividing the minimum time required
by the clock cycle time and then rounding up to the next higher integer.
5. Minimum delay is required to complete write.
6. All devices allow every cycle column address changes.
7. In case of row precharge interrupt, auto precharge and read burst stop.
8. A new command may be given tRFC after self-refresh exit.
Cycle Time
8.0ns
10.0ns
CLOCK FREQUENCY AND LATENCY PARAMETERS
(Unit = number of clock)
CAS
Latency
3
2
tRC
70ns
9
7
tRAS
48ns
6
5
tRP
20ns
3
2
tRRD
16ns
2
2
tRCD
20ns
3
2
tCCD
10ns
1
1
REFRESH CYCLE PARAMETERS
Parameter
Refresh Period (1,2)
Symbol
Min
Max
tREF
—
32
Units
ms
NOTES:
1. 1024 cycles
2. Any time that the Refresh Period has been exceeded, a minimum of two Auto
(CBR) Refresh commands must be given to "wake-up" the device.
White Electronic Designs Corporation • (508) 366-5151 • www.whiteedc.com
6
tCDL
10ns
1
1
tRDL
10ns
2
2
July 2000 Rev. 0
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