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LT8301MP 查看數據表(PDF) - Analog Devices

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LT8301MP Datasheet PDF : 24 Pages
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LT8301
OPERATION
of the output voltage. The inherent minimum switch cur-
rent limit and minimum switch-off time are necessary to
guarantee the correct operation of specific applications.
As the load gets very light, the LT8301 starts to fold
back the switching frequency while keeping the mini-
mum switch current limit. So the load current is able to
decrease while still allowing minimum switch-off time for
the sample-and-hold error amplifier. Meanwhile, the part
switches between sleep mode and active mode, thereby
reducing the effective quiescent current to improve light
load efficiency. In this condition, the LT8301 operates in
low ripple Burst Mode. The 10kHz (typ) minimum switch-
ing frequency determines how often the output voltage is
sampled and also the minimum load requirement.
APPLICATIONS INFORMATION
Output Voltage
The RFB resistor as depicted in the Block Diagram is the
only external resistor used to program the output voltage.
The LT8301 operates similar to traditional current mode
switchers, except in the use of a unique flyback pulse
sense circuit and a sample-and-hold error amplifier, which
sample and therefore regulate the isolated output voltage
from the flyback pulse.
Operation is as follows: when the power switch M1 turns
off, the SW pin voltage rises above the VIN supply. The
amplitude of the flyback pulse, i.e., the difference between
the SW pin voltage and VIN supply, is given as:
VFLBK = (VOUT + VF + ISEC • ESR) • NPS
VF = Output diode forward voltage
ISEC = Transformer secondary current
ESR = Total impedance of secondary circuit
NPS = Transformer effective primary-to-secondary
turns ratio
The flyback voltage is then converted to a current IRFB by
the flyback pulse sense circuit (M2 and M3). This current
IRFB also flows through the internal 10k RREF resistor to
generate a ground-referred voltage. The resulting volt-
age feeds to the inverting input of the sample-and-hold
error amplifier. Since the sample-and-hold error ampli-
fier samples the voltage when the secondary current is
zero, the (ISEC • ESR) term in the VFLBK equation can be
assumed to be zero.
An internal trimmed reference voltage,VIREF 1.0V, feeds
to the non-inverting input of the sample-and-hold error
amplifier. The relatively high gain in the overall loop
causes the voltage across RREF resistor to be nearly equal
to VIREF. The resulting relationship between VFLBK and
VIREF can be expressed as:
⎝⎜
VFLBK
RFB
⎠⎟
• RREF
=
VIREF
or
VFLBK
=
⎝⎜
VIREF
RREF
⎠⎟
• RFB
= IRFB
• RFB
VIREF = Internal trimmed reference voltage
IRFB = RFB regulation current = 100µA
Combination with the previous VFLBK equation yields an
equation for VOUT, in terms of the RFB resistor, trans-
former turns ratio, and diode forward voltage:
VOUT
=
100µA
⎝⎜
RFB
NPS
⎠⎟
VF
Output Temperature Coefficient
The first term in the VOUT equation does not have tem-
perature dependence, but the output diode forward volt-
age VF has a significant negative temperature coefficient
(–1mV/°C to –2mV/°C). Such a negative temperature coef-
ficient produces approximately 200mV to 300mV voltage
variation on the output voltage across temperature.
Rev. B
8
For more information www.analog.com

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