BR25G128FVM-3GTR 查看數據表（PDF） - ROHM Semiconductor

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BR25G128FVM-3GTR

Serial EEPROM Series Standard EEPROM SPI BUS EEPROM

ROHM Semiconductor 

BR25G128-3

Datasheet

WPB Cancel Valid Area

WPB is normally fixed to “H” or “L” for use, but when WPB is controlled so as to cancel write status register command, pay

attention to the following WPB valid timing.

While write status register command is executed, by setting WPB = “L” in cancel valid area, command can be cancelled.

The area from command ope code to CSB rise at internal automatic write start becomes the cancel valid area. However,

once write is started, by any input write cycle cannot be cancelled. WPB input becomes Don’t Care, and cancellation

becomes invalid.

SCK

6

7

15

16

Ope Code

Data

tE/W

Data write time

Invalid

Valid

In valid

Figure 43. WPB valid timing (At inputting WRSR command)

HOLDB Pin

By HOLDB pin, command communication can be stopped temporarily (HOLD status). The command communications are

carried out when the HOLDB pin is HIGH. To get in HOLD status, at command communication, when SCK=LOW, set the

HOLDB pin LOW. At HOLD status, SCK and SI become Don’t Care, and SO becomes high impedance (High-Z). To release

the HOLD status, set the HOLDB pin HIGH when SCK=LOW. After that, communication can be restarted from the point

before the HOLD status. For example, when HOLD status is made after A5 address input at read, after release of HOLD

status, by starting A4 address input, read can be restarted. When in HOLD status, keep CSB LOW. When it is set

CSB=HIGH in HOLD status, the IC is reset, therefore communication after that cannot be restarted.

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19.Mar.2014 Rev.001

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