IRF530 查看數據表（PDF） - Philips Electronics

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IRF530

N-channel TrenchMOS transistor

Philips Electronics 

Philips Semiconductors

N-channel TrenchMOS™ transistor

Product specification

IRF530N

FEATURES

• ’Trench’ technology

• Low on-state resistance

• Fast switching

• Low thermal resistance

SYMBOL

d

g

s

QUICK REFERENCE DATA

VDSS = 100 V

ID = 17 A

RDS(ON) ≤ 110 mΩ

GENERAL DESCRIPTION

N-channel enhancement mode

field-effect power transistor in a

plastic envelope using ’trench’

technology.

Applications:-

• d.c. to d.c. converters

• switched mode power supplies

The IRF530N is supplied in the

SOT78 (TO220AB) conventional

leaded package.

PINNING

PIN

DESCRIPTION

1 gate

2 drain

3 source

tab drain

SOT78 (TO220AB)

tab

drain

123

gate source

drain

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

VDSS

VDGR

VGS

ID

IDM

PD

Tj, Tstg

Drain-source voltage

Drain-gate voltage

Gate-source voltage

Continuous drain current

Pulsed drain current

Total power dissipation

Operating junction and

storage temperature

Tj = 25 ˚C to 175˚C

Tj = 25 ˚C to 175˚C; RGS = 20 kΩ

Tmb = 25 ˚C; VGS = 10 V

Tmb = 100 ˚C; VGS = 10 V

Tmb = 25 ˚C

Tmb = 25 ˚C

MIN.

-

-

-

-

-

-

-

- 55

MAX.

100

100

± 20

17

12

68

79

175

UNIT

V

V

V

A

A

A

W

˚C

AVALANCHE ENERGY LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

EAS

Non-repetitive avalanche Unclamped inductive load, IAS = 7.8 A;

energy

tp = 300 µs; Tj prior to avalanche = 25˚C;

VDD ≤ 25 V; RGS = 50 Ω; VGS = 10 V; refer

to fig:14

IAS

Peak non-repetitive

avalanche current

MIN.

-

MAX.

150

UNIT

mJ

-

17

A

August 1999

1

Rev 1.100

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