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ACS373MS 数据手册 ( 数据表 ) - Intersil

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零件编号
ACS373MS

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Intersil
Intersil Intersil

Description
The Intersil ACS373MS is a radiation hardened octal transparent latch with three-state outputs. The outputs are transparent to the inputs when the latch enable (LE) is high. When the LE goes low, the data is latched. When the Output Enable (OE) is high, the outputs are in the high impedance state. The latch operation is independent of the state of the output enable.


FEATUREs
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose 300K RAD (Si)
• Single Event Upset (SEU) Immunity <1 x 10-10 Errors/Bit-Day (Typ)
• SEU LET Threshold >80 MEV-cm2/mg
• Dose Rate Upset >1011 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55°C to +125°C
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
    - VIL = 30% of VCC Max
    - VIH = 70% of VCC Min
• Input Current ≤1µA at VOL, VOH

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零件编号
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生产厂家
Radiation Hardened Octal Transparent Latch, Three-State
Intersil
Radiation Hardened Octal Three-State Transparent Latch
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Radiation Hardened Octal Three-State Transparent Latch
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Radiation Hardened Octal Three-State Transparent Latch
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Radiation Hardened Octal Transparent Latch, Three-State
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Radiation Hardened Octal Transparent Latch, Three-State
Renesas Electronics
Radiation Hardened Octal Transparent Latch, Three-State
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Radiation Hardened Octal Transparent Latch, Three-State
Intersil
Radiation Hardened Octal Transparent Latch, Three-State
Intersil
Radiation Hardened Octal Transparent Latch, Three-State
Intersil

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