Functional description
The AS7C1024 and AS7C31024 are high performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) devices organized as 131,072 words × 8 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.

FEATUREs
• AS7C1024 (5V version)
• AS7C31024 (3.3V version)
• Industrial and commercial temperatures
• Organization: 131,072 words × 8 bits
• High speed
    - 10/12/15/20 ns address access time
    - 5/6/8/10 ns output enable access time
• Low power consumption: ACTIVE
    - 825 mW (c) / max @ 12 ns
    - 360 mW (AS7C31024) / max @ 12 ns
• Low power consumption: STANDBY
    - 55 mW (AS7C1024) / max CMOS
    - 36 mW (AS7C31024) / max CMOS
• 2.0V data retention
• Easy memory expansion with CE1, CE2, OE inputs
• TTL/LVTTL-compatible, three-state I/O
• 32-pin JEDEC standard packages
    - 300 mil SOJ
    - 400 mil SOJ
    - 8 × 20mm TSOP I
    - 8 × 13.4 mm sTSOP I
• ESD protection ≥ 2000 volts
• Latch-up current ≥ 200 mA