Description
BD3533/31/32 is a termination regulator compatible with JEDEC DDR-SDRAM, which functions as a linear power supply incorporating an N-channel MOSFET and provides a sink/source current capability up to 1A, 1.5A, and 3A respectively. A built-in high-speed OP-AMP specially designed offers an excellent transient response. Requires 3.3 volts or 5.0 volts as a bias power supply to drive the N-channel MOSFET. Has an independent reference voltage input pin (VDDQ) and an independent feedback pin (VTTS) to maintain the accuracy in voltage required by JEDEC, and offers an excellent output voltage accuracy and load regulation. Also has a reference power supply output pin (VREF) for DDR-SDRAM or a memory controller. When EN pin turns to “Low”, VTT output becomes “Hi-Z” while VREF output is kept unchanged, compatible with “Self Refresh” state of DDR-SDRAM.

FEATUREs
1) Incorporates a push-pull power supply for termination (VTT)
2) Incorporates a reference voltage circuit (VREF)
3) Incorporates an enabler
4) Incorporates an undervoltage lockout (UVLO)
5). Employs SOP8 package
6) Employs MSOP8 package
7) Employs HQFN20V package
8) Employs HTSSOP-B20 package
9) Employs VQFN28V package
10) Incorporates a thermal shutdown protector (TSD)
11) Operates with input voltage from 2.7 to 5.5 volts
12) Compatible with Dual Channel (DDR-II)

Use
   Power supply for DDR I/II - SDRAM