System Overview
C8051F36x devices are fully integrated mixed-signal System-on-a-Chip MCUs. Highlighted features are listed below. Refer to Table 1.1for specific product feature selection.

• High-speed pipelined 8051-compatible microcontroller core (up to 100 MIPS)
• In-system, full-speed, non-intrusive debug interface (on-chip)
• True 10-bit 200 ksps 16-channel single-ended/differential ADC with analog multiplexer
• 10-bit Current Output DAC
• 2-cycle 16 by 16 Multiply and Accumulate Engine
• Precision programmable 25 MHz internal oscillator
• Up to 32 kB of on-chip Flash memory—1024 bytes are reserved
• 1024 bytes of on-chip RAM
• External Data Memory Interface with 64 kB address space
• SMBus/I2C, Enhanced UART, and Enhanced SPI serial interfaces implemented in hardware
• Four general-purpose 16-bit timers
• Programmable Counter/Timer Array (PCA) with six capture/compare modules and Watchdog Timer function
• On-chip Power-On Reset, VDDMonitor, and Temperature Sensor
• Two on-chip Voltage Comparators
• up to 39 Port I/O (5 V tolerant)

Analog Peripherals
- 10-Bit ADC (‘F360/1/2/6/7/8/9 only)
• Up to 200 ksps
• Up to 21 external single-ended or differential inputs
• VREF from internal VREF, external pin or VDD
• Internal or external start of conversion source
• Built-in temperature sensor
- 10-Bit Current Output DAC (‘F360/1/2/6/7/8/9 only)
- Two Comparators
• Programmable hysteresis and response time
• Configurable as interrupt or reset source
• Low current (0.4 µA)
- Brown-out detector and POR Circuitry

On-Chip Debug
- On-chip debug circuitry facilitates full speed, non intrusive in-system debug (no emulator required)
- Provides breakpoints, single stepping, inspect/modify memory and registers
- Superior performance to emulation systems using ICE-chips, target pods, and sockets
- Low cost, completedevelopment kit

Supply Voltage
- Range: 2.7–3.6 V (50 MIPS) 3.0–3.6 V (100 MIPS)
- Power saving suspend and shutdown modes

High Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks
- 100 MIPS or 50 MIPS throughput with on-chip PLL
- Expanded interrupt handler
- 2-cycle 16 x 16 MAC engine

Memory
- 1280 bytes internal data RAM (256 + 1024)
- 32 kB (‘F360/1/2/3/4/5/6/7) or 16 kB (‘F368/9) Flash;
   In-system programmable in 1024-byte Sectors—
   1024 bytes are reserved in the 32 kB devices

Digital Peripherals
- up to 39 Port I/O; All 5 V tolerant with high sink current
- Hardware enhanced UART, SMBus™, and enhanced SPI™ serial ports
- Four general purpose 16-bit counter/timers
- 16-Bit programmable counter array (PCA) with six capture/compare modules
- Real time clock mode using PCA or timer and external clock source
- External Memory Interface (EMIF)

Clock Sources
- Two internal oscillators:
• 24.5 MHz with ±2% accuracy supports crystal-less UART operation
• 80/40/20/10 kHz low frequency, low power
- Flexible PLL technology
- External oscillator: Crystal, RC, C, or clock (1 or 2 pin modes)
- Can switch between clock sources on-the-fly; useful in power saving modes

Packages
- 48-pin TQFP (C8051F360/3)
- 32-pin LQFP (C8051F361/4/6/8)
- 28-pin QFN (C8051F362/5/7/9)
Temperature Range: –40 to +85 °C