CP592 数据手册 ( 数据表 ) - Central Semiconductor
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CP592
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Central Semiconductor
PROCESS DETAILS
Process EPITAXIAL PLANAR
Die Size 12 x 20 MILS
Die Thickness 9.0 MILS
Base Bonding Pad Area 3.6 X 3.6 MILS
Emitter Bonding Pad Area 3.6 X 3.6 MILS
Top Side Metalization Al - 30,000Å
Back Side Metalization Au - 18,000Å
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Small Signal Transistor PNP - Amp/Switch Transistor Chip ( Rev : 2006 )
Central Semiconductor
Small Signal Transistors PNP - Amp/Switch Transistor Chip ( Rev : 2006 )
Central Semiconductor
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