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CY7C1484V33-167 数据手册 ( 数据表 ) - Cypress Semiconductor

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零件编号
CY7C1484V33-167

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29 Pages

File Size
503.5 kB

生产厂家
Cypress
Cypress Semiconductor Cypress

Functional Description
The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced single-layer polysilicon, triple-layer metal technology. Each memory cell consists of six transistors.
The CY7C1484V33 and CY7C1485V33 SRAMs integrate 2,097,152 × 36/4,194,304 × 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation.
   
Features
• Fast clock speed: 250, 200, and 167 MHz
• Provide high-performance 3-1-1-1 access rate
• Fast access time: 2.6, 3.0, and 3.4 ns
• Optimal for depth expansion
• Single 3.3V –5% and +5% power supply VDD
• Separate VDDQ for 3.3V or 2.5V
• Common data inputs and data outputs
• Byte Write Enable and Global Write control
• Chip enable for address pipeline
• Address, data, and control registers
• Internally self-timed Write Cycle
• Burst control pins (interleaved or linear burst
    sequence)
• Automatic power-down for portable applications
• High-density, high-speed packages
• JTAG boundary scan for BGA packaging version
• Available in 119-ball bump BGA and 100-pin TQFP
    packages (CY7C1484V33 and CY7C1485V33).
• 165-ball FBGA will be offered on an opportunity basis.
    (Please contact Cypress sales or marketing)
   

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