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HYM328025GS-50 数据手册 ( 数据表 ) - Infineon Technologies

HYM328025GS-50 image

零件编号
HYM328025GS-50

产品描述 (功能)

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11 Pages

File Size
40.4 kB

生产厂家
Infineon
Infineon Technologies Infineon

The HYM 328025S/GS-50/-60 is a 32 MByte DRAM module organized as 8 388 608 words by 32-bit in a 72-pin single-in-line package comprising sixteen HYB 5117405BJ 4M × 4 DRAMs in 300 mil wide SOJ-packages mounted together with sixteen 0.2 µF ceramic decoupling capacitors on a PC board.

• SIMM modules with 8 388 608 words by 32-bit organization for PC main memory applications
• Fast access and cycle time
    50 ns access time
    84 ns cycle time (-50 version)
    60 ns access time
    104 ns cycle time (-60 version)
• Hyper page mode (EDO) capability
    20 ns cycle time (-50 version)
    25 ns cycle time (-60 version)
• Single + 5 V (± 10 %) supply
• Low power dissipation
    max. 5280 mW active (-50 version)
    max. 4840 mW active (-60 version)
    CMOS – 88 mW standby
    TTL –176 mW standby
• CAS-before-RAS refresh
    RAS-only-refresh
    Hidden-refresh
• 16 decoupling capacitors mounted on substrate
• All inputs, outputs and clocks fully TTL compatible
• 72 pin Single in-Line Memory Module (L-SIM-72-15) with 25.40 mm height
• Utilizes sixteen 4Mx4-DRAMs in SOJ packages
• 2048 refresh cycles / 32 ms
• Optimized for use in byte-write non-parity applications
• Tin-Lead contact pads (S- version)
• Gold contact pads (GS -version)

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零件编号
产品描述 (功能)
PDF
生产厂家
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