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LU6612 数据手册 ( 数据表 ) - Agere -> LSI Corporation

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零件编号
LU6612

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36 Pages

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生产厂家
Agere
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Description
The LU6612 is a single-channel, single-chip complete transceiver designed specifically for dual-speed 10Base-T and 100Base-TX repeaters and switches.

LU6612 implements:
■ The 10Base-T transceiver function of IEEE 802.3u.
■ The physical coding sublayer (PCS) of IEEE 802.3u.
■ The physical medium attachment (PMA) of IEEE 802.3u.
■ Autonegotiation of IEEE 802.3u.
■ MII management of IEEE 802.3u.
■ Physical medium dependent (PMD) of IEEE 802.3u.


FEATUREs
10 Mbits/s Transceiver
■ Compatible with IEEE * 802.3u 10Base-T standard for twisted-pair cable
■ Autopolarity detection and correction
■ Adjustable squelch level for extended wire line length capability (2 levels)
■ Interfaces with IEEE 802.3u media independent interface (MII)
■ On-chip filtering eliminates the need for external filters
■ Half- and full-duplex operations

100 Mbits/s Transceiver
■ Compatible with IEEE 802.3u MII (clause 22), PCS (clause 23), PMA (clause 24), autonegotiation (clause 28), and PMD (clause 25) specifications
■ Scrambler/descrambler bypass
■ Encoder/decoder bypass
■ 3-statable MII in 100 Mbits/s mode
■ Selectable carrier sense signal generation (CRS asserted during either transmission or reception in half duplex, CRS asserted during reception only in full duplex)
■ Selectable MII or 5-bit code group interface
■ Half- or full-duplex operations
■ On-chip filtering and adaptive equalization that eliminates the need for external filters

General
■ Autonegotiation (IEEE 802.3u clause 28):
   — Fast link pulse (FLP) burst generator
   — Arbitration function
   — Accepts preamble suppression
   — Operates up to 12.5 MHz
■ Supports the station management protocol and frame format (clause 22):
   — Basic and extended registers
   — Supports next-page function
   — Accepts preamble suppression
   — Operates up to 12.5 MHz
■ Supports the following management functions via pins if station management is unavailable:
   — Speed select
   — Encoder/decoder bypass
   — Scrambler/descrambler bypass
   — Full duplex
   — Autonegotiation
■ Supports half- and full-duplex operations
■ Provides four status signals: receive/transmit activity, full duplex, link integrity, and speed indication
■ Powerdown mode for 10 Mbits/s and 100 Mbits/s operation
■ Loopback for 10 Mbits/s and 100 Mbits/s operation
■ 0.35 µm low-power CMOS technology
■ 64-pin TQFP
■ Single 5 V power supply

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零件编号
产品描述 (功能)
PDF
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