Quad 3-State Bus Transceiver
High–Performance Silicon–Gate CMOS

The MC74HC242 is identical in pinout to the LS242. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
This quad bus transceiver is designed for asynchronous two–way communications between data buses. The states of the Output Enables (A–to–B Enable and B–to–A Enable) determine both the direction of data flow (from A to B or from B to A) and the modes of the Data Ports (input, output, or high–impedance).

• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2 to 6V
• Low Input Current: 1µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the JEDEC Standard No. 7A Requirements
• Chip Complexity: 130 FETs or 32.5 Equivalent Gates