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MT90500(2001) 数据手册 ( 数据表 ) - Zarlink Semiconductor Inc

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零件编号
MT90500

产品描述 (功能)

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160 Pages

File Size
1.1 MB

生产厂家
ZARLINK
Zarlink Semiconductor Inc ZARLINK

Description
The MT90500 Multi-Channel AAL1 SAR is a highly integrated solution which allows systems based on a telecom bus to be interfaced to ATM networks using ATM Adaptation Layer 1 (AAL1), ATM Adaptation Layer 5 (AAL5) and ATM Adaptation Layer 0 (AAL0). The MT90500 can be connected directly to a ST-BUS time division multiplexed (TDM) backplane containing up to 1024 full duplex 64kbps channels. Up to 1024 bi-directional ATM VC connections can be simultaneously processed by the MT90500 AAL1 SAR device.


FEATUREs
• AAL1 Segmentation and Reassembly device compatible with Structured Data Transfer (SDT) as per ANSI T1.630 and ITU I.363 standards
• Transports 64kbps and N x 64kbps traffic over ATM AAL1 cells (also over AAL5 or AAL0)
• Simultaneous processing of up to 1024 bidirectional Virtual Circuits
• Flexible aggregation capabilities (Nx64) to allow any combination of 64 kbps channels while maintaining frame integrity (DS0 grooming)
• Support for clock recovery - Adaptive Clock Recovery, Synchronous Residual Time Stamp (SRTS), or external
• Primary UTOPIA port (Level 1, 25 MHz) for connection to external PHY devices with data throughput of up to 155 Mbps
• Secondary UTOPIA port for connection to an external AAL5 SAR processor, or for chaining multiple MT90500 devices
• 16-bit microprocessor port, configurable to Motorola or Intel timing
• TDM bus provides 16 bidirectional serial TDM streams at 2.048, 4.096, or 8.192 Mbps for up to 2048 TDM 64 kbps channels
• Compatible with ST-BUS, MVIP, H-MVIP and SCSA interfaces
• Supports master and slave TDM bus clock operation
• Loopback function at TDM bus interface
• Local TDM bus provides clocks, input pin and output pin for 2.048 Mbps operation
• Master clock rate up to 60 MHz
• Dual rails (3.3V for power minimization, 5V for standard I/O)
• IEEE1149 (JTAG) interface


APPLICATIONs
• B-ISDN (Broadband ISDN) systems requiring flexible N x 64kbps transport
• Connecting TDM backplane to TDM backplane over ATM network (GO-MVIP MC4, or other)
• Systems requiring ANSI T1.630 Structured Data Transfer services for 1 to 122 TDM channels per VC
• Systems requiring ITU-T I.363.1 circuit transport over Structured Data Transfer for 1 to 96 TDM channels per VC
• Systems requiring AF-VTOA-0078.000 (ATM Forum CES v2.0) “Logical Nx64 Basic Service”
• Systems requiring AF-VTOA-0083.000 Voice and Telephony over ATM (CBR-AAL5).
• Mapping between CBR-AAL0, CBR-AAL5, and AAL1
• Mapping between CBR partially-filled cells and full cells
• Mapping between CBR single-voice cells and Nx64 cells
• ATM uplink for expansion of COs, PBXs, or open switching platforms using an adjunct ATM switch
• ATM Public Network access for PBX or CO
• ATM Edge Switches and CPE IntegratedAccess over ATM
• TDM traffic transfer over an asynchronous cell bus
• Systems requiring Nx64 over CBR-AAL5.

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