[PYRAMID]

DESCRIPTION
The P4C1256 is a 262,144-bit high-speed CMOS static RAM organized as 32Kx8. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs are fully TTL-compatible. The RAM operates from a single 5V±10% tolerance power supply.

FEATURES
■ High Speed (Equal Access and Cycle Times)
    — 12/15/20/25/35 ns (Commercial)
    — 15/20/25/35/45 ns (Industrial)
    — 20/25/35/45/55/70 ns (Military)
■ Low Power
■ Single 5V±10% Power Supply
■ Easy Memory Expansion Using CE and OE Inputs
■ Common Data I/O
■ Three-State Outputs
■ Fully TTL Compatible Inputs and Outputs
■ Advanced CMOS Technology
■ Fast tOE
■ Automatic Power Down
■ Packages
    —28-Pin 300 mil DIP, SOJ, TSOP
    —28-Pin 300 mil Ceramic DIP
    —28-Pin 600 mil Ceramic DIP
    —28-Pin CERPACK
    —28-Pin SOP
    —28-Pin LCC (350 mil x 550 mil)
    —32-Pin LCC (450 mil x 550 mil)