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PIC18LF2450-EP 数据手册 ( 数据表 ) - Microchip Technology

PIC18F2450-E/ML image

零件编号
PIC18LF2450-EP

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324 Pages

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3.2 MB

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Microchip
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Overview
Devices in the PIC18F2450/4450 family incorporate a different oscillator and microcontroller clock system than the non-USB PIC18F devices. The addition of the USB module, with its unique requirements for a stable clock source, make it necessary to provide a separate clock source that is compliant with both USB low-speed and full-speed specifications.

Universal Serial Bus Features:
• USB V2.0 Compliant
• Low Speed (1.5 Mb/s) and Full Speed (12 Mb/s)
• Supports Control, Interrupt, Isochronous and Bulk Transfers
• Supports Up to 32 Endpoints (16 bidirectional)
• 256-Byte Dual Access RAM for USB
• On-Chip USB Transceiver with On-Chip Voltage Regulator
• Interface for Off-Chip USB Transceiver

Power-Managed Modes:
• Run: CPU on, Peripherals on
• Idle: CPU off, Peripherals on
• Sleep: CPU off, Peripherals off
• Idle mode Currents Down to 5.8 μA Typical
• Sleep mode Currents Down to 0.1 μA Typical
• Timer1 Oscillator: 1.8 μA Typical, 32 kHz, 2V
• Watchdog Timer: 2.1 μA Typical
• Two-Speed Oscillator Start-up

Flexible Oscillator Structure:
• Four Crystal modes, including High-Precision PLL for USB
• Two External Clock modes, up to 48 MHz
• Internal 31 kHz Oscillator
• Secondary Oscillator using Timer1 @ 32 kHz
• Dual Oscillator Options allow Microcontroller and USB module to Run at Different Clock Speeds
• Fail-Safe Clock Monitor:
   - Allows for safe shutdown if any clock stops

Peripheral Highlights:
• High-Current Sink/Source: 25 mA/25 mA
• Three External Interrupts
• Three Timer modules (Timer0 to Timer2)
• Capture/Compare/PWM (CCP) module:
   - Capture is 16-bit, max. resolution 5.2 ns
   - Compare is 16-bit, max. resolution 83.3 ns
   - PWM output: PWM resolution is 1 to 10-bit
• Enhanced USART module:
   - LIN bus support
• 10-Bit, Up to 13-Channel Analog-to-Digital Converter module (A/D):
   - Up to 100 ksps sampling rate
   - Programmable acquisition time

Special Microcontroller Features:
• C Compiler Optimized Architecture with Optional Extended Instruction Set
• Flash Memory Retention: > 40 Years
• Self-Programmable under Software Control
• Priority Levels for Interrupts
• 8 x 8 Single-Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 131s
• Programmable Code Protection
• Single-Supply In-Circuit Serial Programming™ (ICSP™) via Two Pins
• In-Circuit Debug (ICD) via Two Pins
• Optional Dedicated ICD/ICSP Port (44-pin TQFP devices only)
• Wide Operating Voltage Range (2.0V to 5.5V)

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