The HYB 5116(7)405BJ/BT is a 16MBit dynamic RAM organized as 4194304 words by 4-bits. The HYB 5116(7)405BJ/BT utilizes a submicron CMOS silicon gate process technology, as well as advanced circuit techniques to provide wide operating margins, both internally and for the system user. Multiplexed address inputs permit the HYB 5116(7)405BJ/BT to be packaged in a standard SOJ 26/24 or TSOPII-26/24 plastic package, both with 300 mil width. These packages provide high system bit densities and are compatible with commonly used automatic testing and insertion equipment. System-oriented features include single + 5 V (± 10 %) power supply, direct interfacing with high-performance logic device families such as Schottky TTL.

Advanced Information
• 4 194 304 words by 4-bit organization
• 0 to 70 °C operating temperature
• Performance:
• Single + 5 V (± 10 %) supply
• Low power dissipation
    max. 550 mW active (HYB5116405BJ/BT-50)
    max. 495 mW active (HYB5116405BJ/BT-60)
    max. 440 mW active (HYB5116405BJ/BT-70)
    max. 660 mW active (HYB5117405BJ/BT-50)
    max. 605 mW active (HYB5117405BJ/BT-60)
    max. 550 mW active (HYB5117405BJ/BT-70)
    11 mW standby (TTL)
    5.5. mW standby (MOS)
• Output unlatched at cycle end allows two-dimensional chip selection
• Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh, self refresh and test mode
• Hyper page mode (EDO) capability
• All inputs, outputs and clocks fully TTL-compatible
• 4096 refresh cycles / 64 ms for HYB5116405BJ/BT (4k-Refresh)
• 2048 refresh cycles / 32 ms for HYB5117405BJ/BT (2k-Refresh)
• Plastic Package: P-SOJ-26/24 300 mil P TSOPII-26/24 300 mil