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SL74HC109N 数据手册 ( 数据表 ) - System Logic Semiconductor

SL74HC109D image

零件编号
SL74HC109N

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The SL74HC109 is identical in pinout to the LS/ALS109. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are compatible with LS/ALSTTL outputs.
This device consists of two J-K flip-flops with individual set, reset, and clock inputs. Changes at the inputs are reflected at the outputs with the next low-to-high transition of the clock. Both Q to Q outputs are available from each flip-flop.

• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 μA
• High Noise Immunity Characteristic of CMOS Devices

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Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS
System Logic Semiconductor
Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS
IK Semicon Co., Ltd
Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS
Integral Corp.
Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS
Integral Corp.
Dual J-K Flip-Flop with Set and Reset High−Performance Silicon−Gate CMOS
ON Semiconductor
Dual “J-K” Flip-Flop with Set and Reset
Intersil
Dual J-K Flip-Flop with Set and Reset
Motorola => Freescale
Dual J-K Flip-Flop with Set and Reset
IK Semicon Co., Ltd
Dual J-K Flip-Flop with Set and Reset
ON Semiconductor
Dual “J-K” Flip-Flop with Set and Reset
Intersil

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