datasheetbank_Logo
数据手册搜索引擎和 Datasheet免费下载 PDF
HOME  >>>  STMicroelectronics  >>> STI1010 PDF

STI1010 数据手册 ( 数据表 ) - STMicroelectronics

STI1010 image

零件编号
STI1010

Other PDF
  no available.

PDF
DOWNLOAD     

page
5 Pages

File Size
118.6 kB

生产厂家
ST-Microelectronics
STMicroelectronics ST-Microelectronics

Description
The STi1010 is a highly-integrated, high-performance system-on-chip iDTV processor compliant with worldwide digital TV standards such as ATSC (US), DVB (Europe), ARIB (Japan), DMB-TH (China) and PAL/SECAM/NTSC analog TV standards.
The STi1010 provides a cost-optimized solution for iDTV (basic TV platform DTV150), with a minimum number of external components, 32-bit unified DDR2 memory interface for CPU, OSD, video.
The STi1011 version permits low-cost iDTV implementation with a single 16-bit DDR2 memory interface.
The STi1010 is able to receive TV signals from either analog or digital terrestrial transmission, cable tuner, satellite tuner, external audio/video sources such as DVD players, STB, PVR, PC, and so on. The STi1010 allows low-cost implementation of matrixed display integrated Digital TV, including HDTV display: LCD display, Plasma Display Panel (PDP), Rear Projection TV (RPTV) and Digital Light Processing (DLP) RPTV up to 1920 × 1080p resolution.
The STi1010 provides Dual LVDS output, which can drive 18-bit, 24-bit or 30-bit flat panels, up to Full HD definition. Video output has programmable Line and Pixel output formats (1366 × 768 and 1920 × 1080 resolution included). The STi1010 also provides CVBS and YC output from a digital PAL/SECAM/NTSC encoder.
The STi1010 supports the decoding and processing of Standard Definition (SD) and High Definition (HD), analog and digital video sources, and the decoding and processing of digital audio from stereo up to 5.1 audio channels.


FEATUREs
■ 32-Bit RISC ST40 CPU, 266 MHz, 480 MIPs
■ DDR2 unified memory interface, 250 MHz clock
■ Transport stream demultiplexer with DES, DVB and Multi2 descrambler
■ CableCard and DVB-CI interface
MP@ML and MP@HL MPEG2 video decoder
■ 24-bit audio DSP core, MPEG1(layers 1,2,3), MPEG2, MPEG2-AAC, Dolby® Digital, MP3 decoder
■ Analog video input: CVBS, SVHS(Y/C), Component (from SD up to HD 720p, 1080i, 1080p)
■ PC input, analog RGB up to UXGA/60 Hz (162 MHz sampling frequency)
■ 24-bit digital video input, up to 1080p and UXGA/60 Hz
■ HDMI/HDCP input, RGB/YCrCb up to 1080p, UXGA/60 Hz support, stereo and 5.1 multi-channel audio. Compliant with HDMI 1.3, DVI 1.0, HDCP v1.3
■ USB2.0 high speed interface (480 Mbits/s)
■ High definition video processor
■ Multi-standard color decoder (PAL/SECAM/NTSC), with 3D comb filtering in NTSC and PAL, Luma and Chroma spatio-temporal (3D) noise reduction
■ Double video pipe for Picture In Picture (PIP) display
■ 2D graphic accelerator and enhanced True color on screen display. Bitmap OSD generated at panel resolution
■ Video and graphic composition for Picture And Text (PAT), Picture And Graphic (PAG), mosaic
■ Exhaustive set of peripherals for DTV chassis control
■ Dual LVDS output for flat panel display support, up to full HD 1920 × 1080p resolution.
■ Package FPBGA 27×27, 700 balls, pitch 0.8 mm

Page Link's: 1  2  3  4  5 

零件编号
产品描述 (功能)
PDF
生产厂家
Worldwide H.264/MPEG decoder + Faroudja video processing iDTV SoC
STMicroelectronics
Single Chip Karaoke Processor
Renesas Electronics
SINGLE CHIP SURROUND PROCESSOR
Renesas Electronics
SINGLE CHIP SURROUND PROCESSOR
MITSUBISHI ELECTRIC
Single-Chip Video Processor
Micronas
SINGLE CHIP SURROUND PROCESSOR
Renesas Electronics
SINGLE CHIP SURROUND PROCESSOR
MITSUBISHI ELECTRIC
SINGLE CHIP KARAOKE PROCESSOR
MITSUBISHI ELECTRIC
Single-Chip GPS Baseband Processor
Prolific
GSM SINGLE-CHIP BASEBAND PROCESSOR
Broadcom Corporation

Share Link: GO URL

EnglishEnglish Korean한국어 Chinese简体中文 Japanese日本語 Spanishespañol

All Rights Reserved© datasheetbank.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]