Description
The TMC2249A is a high-speed digital arithmetic circuit consisting of two 12-bit multipliers, an adder and a cascadeable accumulator. All four multiplier inputs are simultaneously accessible to the user, and each includes a userprogrammable pipeline delay of up to 16 clocks in length. The 24-bit adder/subtractor is followed by an accumulator and 16-bit input port which allows the user to cascade multiple TMC2249As. A new 16-bit accumulated output is available every clock, up to the maximum rate of 60 MHz. All inputs and outputs are registered except the three-state output enable, and all are TTL compatible.

FEATUREs
• 60 MHz input and computation rate
• Two 12-bit multipliers
• Separate data and coefficient inputs
• Independent, user-selectable pipeline delays of 1 to 16 clocks on all input ports
• Separate 16-bit input port allows cascading or addition of a constant
• User-selectable rounded output
• Internal 1/2 LSB rounding of products
• Fully registered, pipelined architecture
• Available in 120-Pin CPGA, PPGA, MPGA or MQFP

APPLICATIONs
• Video switching
• Image mixing
• Digital signal modulation
• Complex frequency synthesis
• Digital filtering
• Complex arithmetic functions