datasheetbank_Logo
数据手册搜索引擎和 Datasheet免费下载 PDF
HOME  >>>  ETC  >>> UT54ACTS74 PDF

UT54ACTS74 数据手册 ( 数据表 ) - ETC

UT54ACS74 image

零件编号
UT54ACTS74

Other PDF
  no available.

PDF
DOWNLOAD     

page
6 Pages

File Size
34.9 kB

生产厂家
ETC
ETC ETC

[RadHard MSI Logic]

DESCRIPTION
The UT54ACS74 and the UT54ACTS74 contain two independent D-type positive triggered flip-flops. A low level at the Preset or Clear inputs sets or resets the outputs regardless of the levels of the other inputs. When Preset and Clear are inactive (high), data at the D input meeting the setup time requirement is transferred to the outputs on the positive-going edge of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs.
The devices are characterized over full military temperature range of -55 C to +125 C.


FEATURES
• radiation-hardened CMOS
   - Latchup immune
• High speed
• Low power consumption
• Single 5 volt supply
• Available QML Q or V processes
• Flexible package
   - 14-pin DIP
   - 14-lead flatpack

Page Link's: 1  2  3  4  5  6 

零件编号
产品描述 (功能)
PDF
生产厂家
Dual D Flip-Flops with Clear & Preset
Aeroflex Corporation
Dual D–type Flip Flops with Preset and Clear
Hitachi -> Renesas Electronics
Dual D-type Flip-Flops (with Preset and Clear)
Renesas Electronics
Dual D–type Flip Flops with Preset and Clear
Renesas Electronics
Dual D-type Flip-Flops (with Preset and Clear)
Hitachi -> Renesas Electronics
Dual D-type Flip Flops with Preset and Clear
Hitachi -> Renesas Electronics
Dual D-type Flip-Flops (with Preset and Clear) ( Rev : 2008 )
Renesas Electronics
Dual D-type Flip Flops with Preset and Clear
Renesas Electronics
Dual J-K Flip-Flops with Clear and Preset
Fairchild Semiconductor
Dual J-K Flip-Flops (with Preset and Clear)
Hitachi -> Renesas Electronics

Share Link: GO URL

EnglishEnglish Korean한국어 Chinese简体中文 Japanese日本語 Spanishespañol

All Rights Reserved© datasheetbank.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]