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VSC7226-02(2001) 数据手册 ( 数据表 ) - Vitesse Semiconductor

VSC7226-01 image

零件编号
VSC7226-02

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  2000   lastest PDF  

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2 Pages

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Vitesse
Vitesse Semiconductor Vitesse

General Description
The VSC7226-01 and VSC7226-02 are quad, 8-bit, parallel-to-serial and serial-to-parallel transceiver chips used for high bandwidth interconnection between busses, backplanes, or other subsystems. Four Gigabit Ethernet compliant transceivers provide over 20Gb/s of duplex raw data transfer. Each channel of the VSC7226 can be operated at a maximum data transfer rate of 2500Mb/s (8 bits at 312.5MByte/s) or a minimum while in half-rate mode of 960Mb/s (8 bits at 120MByte/s). Each channel of the VSC7226-01 can be operated at a maximum data transfer rate of 1920Mb/s (8 bits at 240MByte/s) or a minimum while in half-rate mode of 760Mb/s (8 bits at 95MByte/s). The VSC7226-01 and VSC7226-02 contain four 8B/10B encoders, serializers, de-serializers, 8B/10B decoders and elastic buffers which provide the user with a simple interface for transferring data serially and recovering it on the receive side. The device can also be configured to operate as four non-encoded 10-bit transceivers.


FEATUREs
• 4 Gigabit Ethernet-Compliant Transceivers
• Per Channel Control of Dual Speed, XAUI-Compliant Links
• VSC7226-01: 1.2 to 1.56Gb/s or 2.4 to 3.125Gb/s
• VSC7226-02: 0.95 to 1.2Gb/s or 1.9 to 2.4Gb/s
• Over 20Gb/s Duplex Raw Data Rate
• Redundant PECL Tx Outputs and Rx Inputs with Reduced Tx Output Swing Option
• 8B/10B Encoder with Bypassing Option on Each Channel
• “ASIC-FriendlyTM” Timing Options for Transmitter Parallel Input Data
• Parallel Busses are SSTL_2 at up to 312.5Mb/s
• On-Chip Fixed Serial Tx Output Terminations and Selectable Rx Input Terminations
• Fast-Locking CRU
• Elastic Buffers for Intra-Chip Cable Deskewing and Channel-to-Channel Alignment
• Rate Matching Via IDLE Insertion/Deletion
• MDIO Serial Configuration Port
• Serial Link Compatible with VSC7211/7212/7214/7216
• Recovered Clock or Reference Clock Based Receiver Output Timing Modes
• PECL Receiver Signal Detect, Cable Equalizer and Tx Pre-Emphasis
• Per-Channel Serial Tx-to-Rx and Parallel Rx-to-Tx Internal Loopback Modes
• Automatic Lock-to-Reference
• JTAG Test Port/Built-In Self Test
• 2.5V Supply, 3.0W
• 256-Pin, 21mm BGA Package

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