General Description
The W90210F Embedded Controller is part of Winbond¢s W90K Embedded processor family. The processor is a high-performance, highly integrated 32-bit processor intended for a wide range of embedded applications, such as set-top box, web browser, X-terminal, and visual/data communication devices..

FEATUREs
Main features of the W90210F
• PA-RISC architecture
   PA-RISC 1.1 third edition instruction set
   PA-RISC level zero implementation
   Support PA-RISC Multimedia Extension 1.0 instruction set
   W90K binary compatible for user software
• High-performance implementation
   Five-stage pipeline
   Precise, efficient handling of pipeline stalls and exceptions
   Delayed branch with static branch prediction
      Forward: not taken
      Backward: taken
      One-cycle stall when prediction is wrong
   HIT under miss
      Both load and store can be queued when miss
      Load/store single cycle execution after previous miss
• On-chip cache memory
   Internal I-cache: Direct mapped, 4 KB cache (256 entries, four words/entry)
      Wrap around fetching when cache miss
      Cache freeze capability
   Internal D-cache: 2-way set associative, 2 KB cache (2 ´64 entries, four words/entry)
      Write-back cache with write buffer
      Write-through option
      New line send to CPU before dirty line write back
• Enhanced debug capability
   Debug SFU supports both instruction breakpoints and data breakpoints
• High on-chip integration and simple I/O interface
   486-like bus interface for CPU core
   Memory controller to support four banks of DRAM and ROM/FLASH ROM
   2-channel 8-bit DMA controller
   PCI bridge
   Two Serial ports with FIFO
   Extended Capabilities Port (ECP)
   Two 24-bit timer/counters
• Power Down mode
   Provide power down mode for power saving operation