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ZL50062 数据手册 ( 数据表 ) - Zarlink Semiconductor Inc

ZL50062 image

零件编号
ZL50062

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68 Pages

File Size
891 kB

生产厂家
ZARLINK
Zarlink Semiconductor Inc ZARLINK

Features
• 16,384-channel x 16,384-channel non-blocking
   unidirectional switching.The Backplane and Local
   inputs and outputs can be combined to form a
   non-blocking switching matrix with 64 input
   streams and 64 output streams
• 8,192-channel x 8,192-channel non-blocking
   Backplane input to Local output stream switch
• 8,192-channel x 8,192-channel non-blocking
   Local input to Backplane output stream switch
• 8,192-channel x 8,192-channel non-blocking
   Backplane input to Backplane output switch
• 8,192-channel x 8,192-channel non-blocking
   Local input to Local output stream switch
• Backplane port accepts 32 input and 32 output
   ST-BUS streams with fixed data rates of
   2.048Mbps, 4.096Mbps, 8.192Mbps or
   16.384Mbps
• Local port accepts 32 input and 32 output 
   ST-BUS streams with fixed data rates of 2.048Mbps,
   4.096Mbps, 8.192Mbps or 16.384Mbps
• Exceptional input clock jitter tolerance (17ns)
• Per-stream bit delay for Local and Backplane
   input streams
• Per-stream advancement for Local and Backplane
   output streams
• Constant 2-frame throughput delay for frame
   integrity
• Per-channel high impedance output control for
   Local and Backplane streams
• Per-channel driven-high output control for Local
   and Backplane streams
• Per-channel message mode for Local and
   Backplane output streams
• Connection memory block programming for fast
   device initialization
• Automatic selection between ST-BUS and GCI-Bus operation
• Non-multiplexed Motorola microprocessor interface
• Conforms to the mandatory requirements of the IEEE-1149.1 (JTAG) standard
• Memory Built-In-Self-Test (BIST), controlled via microprocessor register
• 1.8V core supply voltage
• 3.3V I/O supply voltage
• 5V tolerant inputs, outputs and I/Os


APPLICATIONs
• Central Office Switches (Class 5)
• Media Gateways
• Class-independent switches
• Access Concentrators
• Scalable TDM-Based Architectures
• Digital Loop Carriers


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