5962R9582001QJC 查看數據表（PDF） - Intersil

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5962R9582001QJC

Radiation Hardened CMOS Static Clock Controller/Generator

Intersil 

HS-82C85RH

Waveforms

EFI I

OSC O

tEHEL

CLK O

tELEL

tELEH

tOHCH

CLK50 O

PCLK O

CSYNC I

tCLC50L

tYHEH

TCLPH

tEHYL

tYHYL

tOHCL

tCHCL

tCLCH

tCLCL

tOLCH

t5CLCH

t5CHCL

tPHPL

tCLPL

tPLPH

FIGURE 1. WAVEFORMS FOR CLOCKS

NOTE: All timing measurements are made at 1.5V, unless otherwise noted.

CLK AND CLK50

3.5V

1.0V

tCL2CL1

tCH1CH2

CLK

RDY1, 2

AEN1, 2

ASYNC

READY

tCLR1X

tR1VCH

tA1VR1V

tCLR1X

tR1VCL

tAYVCL

tCLA1X

tCLAYX

tRYHCH

tRYLCL

FIGURE 2. WAVEFORMS FOR READY SIGNALS (FOR ASYNCHRONOUS DEVICES)

5

FN3044.3

April 20, 2007

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