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BIT3713 查看數據表(PDF) - Unspecified

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BIT3713 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
Beyond Innovation Technology Co., Ltd.
CTOSC=100KHz
Fig.2
Then the frequency deviation can be calculated as
Equation (2)
Fn
F100KHz
100KHz
Fn
.............(2)
BIT3713
Setting the Frequency of the 2nd Low Frequency
PWM Generator: A 2nd internal trimmed low frequency
oscillator generates a 3% accurate frequency on
CTPWM pin with external capacitors. The capacitor
values versus operation frequencies are as bellow:
FLFPWM
4512
CCTPWM 0.005
nF
.............(3)
Note: Above equation (3) is valid only when operating
frequency is between 150Hz ~ 1.5KHz
The logic high output of pin PWMOUT is made by a 2.5V
DC voltage and the floating state makes the logic low
portion. MODSEL pin provides the polarity selection of
LF_PWM generator. If MODSEL pin is 0V, a 0% duty cycle
is obtained when PWMDC < 1.0V. If this pin is pulled to
IC VDD level, 0% duty cycle is obtained while PWMDC>
2.5V.
Note: BIT3713 limits the maximum duty cycle to about 92
%. PWMOUT sends the pulses when ISEN >1.3V or
TIMER >2.5V.
UVLO: The under-voltage-lockout circuit turns the output
driver off when supply voltage drops too low. Whole
system includes the protection and timing circuits are reset
(pin TIMER =0) in low VDD state.
DC/AC Characteristics:
Absolute Ratings:
Table 3
Parameter
Supply Voltage
Ground
Input pin Voltage
Operating Ambit Temperature
Operating Junction Temperature
Storage Temperature
Symbol
VDD
GND
Ta
Ratings
-0.3~+ 8.8
±0.3
-0.3~ VDD+0.3
-20 ~ +85
+150
-55~+150
Unit Remarks
V
V Ta=25°C
V
C
C
C
BiTEK
December 20, 2005
DCC CONTROLLED
05/12/15
Preliminary
Confidential, for authorized user only
page 6 of 11

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