)6
0RWKHUERDUG &ORFN *HQHUDWRU ,&
X T
Figure 10: DC Measurement Points
3.3V
VOH 3.3 = 2.4V
1.5V
VOL 3.3 = 0.4V
(device
interface)
VIH 3.3 = 2.0V
VIL 3.3 = 0.8V
(system
interface)
A. 3.3V Clock Interface
January 2000
VOH 2.5 = 2.0V
1.25V
VOL 2.5 = 0.4V
(device
interface)
2.5V
VIH 2.5 = 1.7V
VIL 2.5 = 0.7V
(system
interface)
B. 2.5V Clock Interface
Figure 11: Timing Diagrams
τKP
tr
tf
tKH
2.4V
1.5V
tKL
0.4V
Duty Cycle
A. 3.3V Clock Interface
tr
tKH
τKP
tf
tKL
Duty Cycle
B. 2.5V Clock Interface
2.0V
1.25V
0.4V
Table 10: CPU_0:3, CPU/2_0:1, APIC_0:2 Clock Outputs
Voltage
(V)
High Drive Current (mA)
MIN. TYP. MAX.
0
0
0.1
3
0.2
6
0.3
9
0.4
12
0.5
15
0.6
17
0.7
19
0.8
21
0.9
23
1
24
1.1
25
1.2
27
1.3
27
1.4
28
1.6
29
1.8
29
2.2
29
2.375
29
2.5
2.625
0
0
7
11
13
21
19
30
24
40
30
48
35
56
39
63
43
70
47
77
50
83
53
88
56
93
58
97
60
100
62
106
63
110
63
111
63
111
63
111
111
,62
Voltage
(V)
0
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
1.9
2
2.1
2.2
2.3
2.375
2.5
2.625
Low Drive Current (mA)
MIN. TYP. MAX.
-28
-61
-107
-28
-61
-107
-28
-61
-107
-28
-61
-107
-27
-60
-105
-26
-58
-101
-24
-53
-94
-21
-48
-85
-17
-40
-73
-15
-36
-67
-12
-31
-59
-9
-25
-51
-6
-20
-43
-3
-14
-34
0
-9
-27
0
-14
0
14
120
100
80
60
40
20
0
0
-20
-40
-60
-80
-100
-120
0.5
1
1.5
2
Output Voltage (V)
2.5
30Ω
50Ω
90Ω
Data in this table represents nominal characterization data only
1.31.00