5P49V5901BDDDNLGI 查看數據表（PDF） - Integrated Device Technology

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5P49V5901BDDDNLGI

Programmable Clock Generator

Integrated Device Technology 

Example 1: The crystal load capacitance is specified as 8pF

and the stray capacitance at each crystal pin is Cs=1.5pF.

Assuming equal capacitance value at XIN and XOUT, the

equation is as follows:

8pF = (9pF + 0.5pF × XTAL[5:0] + 1.5pF) / 2 →

0.5pF × XTAL[5:0] = 5.5pF → XTAL[5:0] = 11 (decimal)

Example 2: The crystal load capacitance is specified as 12pF

and the stray capacitance Cs is unknown. Footprints for

external capacitors Ce are added and a worst case Cs of 5pF

is used. For now we use Cs + Ce = 5pF and the right value for

Ce can be determined later to make 5pF together with Cs.

12pF = (9pF + 0.5pF × XTAL[5:0] + 5pF) / 2 →

XTAL[5:0] = 20 (decimal)

Manual Switchover Mode

When SM[1:0] is “0x”, the redundant inputs are in manual

switchover mode. In this mode, CLKSEL pin is used to switch

between the primary and secondary clock sources. The

primary and secondary clock source setting is determined by

the PRIMSRC bit. During the switchover, no glitches will occur

at the output of the device, although there may be frequency

and phase drift, depending on the exact phase and frequency

relationship between the primary and secondary clocks.

5P49V5901 DATASHEET

MARCH 3, 2017

7

PROGRAMMABLE CLOCK GENERATOR

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