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74HC595(2017) 查看數據表(PDF) - NXP Semiconductors.

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74HC595 Datasheet PDF : 22 Pages
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Nexperia
74HC595; 74HCT595
8-bit serial-in, serial or parallel-out shift register with output latches; 3-state
VI 90 %
tW
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
RT
VCC
RL S1
CL
open
001aad983
Test data is given in Table 9.
Definitions for test circuit:
CL = load capacitance including jig and probe capacitance.
RL = load resistance.
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
S1 = test selection switch.
Figure 13. Test circuit for measuring switching times
Table 9. Test data
Type
Input
VI
74HC595
VCC
74HCT595 3 V
tr, tf
6 ns
6 ns
Load
CL
50 pF
50 pF
RL
1 kΩ
1 kΩ
S1 position
tPHL, tPLH
open
tPZH, tPHZ
GND
open
GND
tPZL, tPLZ
VCC
VCC
74HC_HCT595
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 9 — 28 February 2017
© Nexperia B.V. 2017. All rights reserved.
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