AD5061 查看數據表（PDF） - Analog Devices

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AD5061

Fully Accurate 16-Bit VOUT nanoDAC™ SPI Interface 2.7 V to 5.5 V, in an SOT-23

Analog Devices 

AD5061

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Timing Characteristics..................................................................... 5

Absolute Maximum Ratings............................................................ 6

ESD Caution.................................................................................. 6

Pin Configuration and Function Descriptions............................. 7

Typical Performance Characteristics ............................................. 8

Terminology .................................................................................... 14

Theory of Operation ...................................................................... 15

DAC Architecture....................................................................... 15

REVISION HISTORY

1/06—Rev. 0 to Rev. A

Changes to General Description .................................................... 1

Changes to Table 2............................................................................ 3

Changes to Figure 19 Caption....................................................... 10

Added Figure 28 to Figure 36........................................................ 12

Changes to Serial Interface Section.............................................. 15

Changes to Power-Down Modes Section .................................... 16

Changes to Ordering Guide .......................................................... 20

7/05—Revision 0: Initial Version

Reference Buffer ......................................................................... 15

Serial Interface ............................................................................ 15

Input Shift Register .................................................................... 15

SYNC Interrupt .......................................................................... 15

Power-On to Zero-Scale or Midscale ...................................... 16

Software Reset............................................................................. 16

Power-Down Modes .................................................................. 16

Microprocessor Interfacing....................................................... 16

Applications..................................................................................... 18

Choosing a Reference ................................................................ 18

Bipolar Operation....................................................................... 18

Using a Galvanically-Isolated Interface Chip ......................... 19

Power Supply Bypassing and Grounding................................ 19

Outline Dimensions ....................................................................... 20

Ordering Guide .......................................................................... 20

Rev. A | Page 2 of 20

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