AD7910 查看數據表（PDF） - Analog Devices
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AD7910 Datasheet PDF : 24 Pages
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AD7910/AD7920
SPECIFICATIONS
AD7910
VDD = 2.35 V to 5.25 V, fSCLK = 5 MHz, fSAMPLE = 250 kSPS, TA = TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter1
DYNAMIC PERFORMANCE
Signal-to-Noise + Distortion (SINAD)3
Total Harmonic Distortion (THD)3
Peak Harmonic or Spurious Noise (SFDR)3
Intermodulation Distortion (IMD)3
Second-Order Terms
Third-Order Terms
Aperture Delay
Aperture Jitter
Full Power Bandwidth
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error3, 4
Gain Error3, 4
Total Unadjusted Error (TUE)3, 4
ANALOG INPUT
Input Voltage Ranges
DC Leakage Current
Input Capacitance
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN, SCLK Pin
Input Current, IIN, CS Pin
Input Capacitance, CIN5
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance5
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time3
Throughput Rate
POWER REQUIREMENTS
VDD
IDD
Normal Mode (Static)
Normal Mode (Operational)
Full Power-Down Mode
A Grade1, 2
61
−72
−73
Unit
dB min
dB max
dB max
Test Conditions/Comments
fIN = 100 kHz sine wave
−82
dB typ
fa = 100.73 kHz, fb = 90.7 kHz
−82
dB typ
fa = 100.73 kHz, fb = 90.7 kHz
10
ns typ
30
ps typ
13.5
MHz typ
@ 3 dB
2
MHz typ
@ 0.1 dB
10
Bits
±0.5
LSB max
±0.5
LSB max
Guaranteed no missed codes to 10 bits
±1
LSB max
±1
LSB max
±1.2
LSB max
0 to VDD
±0.5
20
V
μA max
pF typ
Track-and-hold in track, 6 pF typ when in hold
2.4
0.8
0.4
± 0.5
± 10
5
V min
V max
V max
μA max
nA typ
pF max
VDD = 5 V
VDD = 3 V
Typically 10 nA, VIN = 0 V or VDD
VDD − 0.2
V min
0.4
V max
±1
μA max
5
pF max
Straight (natural) binary
ISOURCE = 200 μA, VDD = 2.35 V to 5.25 V
ISINK = 200 μA
2.8
μs max
14 SCLK cycles with SCLK at 5 MHz
250
ns max
250
kSPS max
2.35/5.25
2.5
1.2
3
1.4
1
V min/max
mA typ
mA typ
mA max
mA max
μA max
Digital I/Ps = 0 V or VDD
VDD = 4.75 V to 5.25 V, SCLK on or off
VDD = 2.35 V to 3.6 V, SCLK on or off
VDD = 4.75 V to 5.25 V, fSAMPLE = 250 kSPS
VDD = 2.35 V to 3.6 V, fSAMPLE = 250 kSPS
Typically 50 nA
Rev. C | Page 3 of 24
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