AD7910 查看數據表（PDF） - Analog Devices
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AD7910 Datasheet PDF : 24 Pages
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AD7910/AD7920
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VDD 1
6 CS
AD7910/
GND 2 AD7920 5 SDATA
TOP VIEW
(Not to Scale)
VIN 3
4 SCLK
Figure 5. 6-Lead SC70 Pin Configuration
VDD 1
SDATA 2
CS 3
NC 4
AD7910/
AD7920
TOP VIEW
(Not to Scale)
8 VIN
7 GND
6 SCLK
5 NC
NC = NO CONNECT
Figure 6. 8-Lead MSOP Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Pin No.
6-Lead 8-Lead
SC70 MSOP Mnemonic Description
6
3
CS
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the
AD7910/AD7920 and framing the serial data transfer.
1
1
2
7
3
8
5
2
4
6
N/A
4, 5
VDD
GND
VIN
SDATA
SCLK
NC
Power Supply Input. The VDD range for the AD7910/AD7920 is from 2.35 V to 5.25 V.
Analog Ground. Ground reference point for all circuitry on the AD7910/AD7920. All analog input signals
should be referred to this GND voltage.
Analog Input. Single-ended analog input channel. The input range is 0 to VDD.
Data Out. Logic output. The conversion result from the AD7910/AD7920 is provided on this output as a
serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from
the AD7920 consists of four leading zeros followed by the 12 bits of conversion data, which is provided
MSB first. The data stream from the AD7910 consists of four leading zeros followed by the 10 bits of
conversion data followed by two trailing zeros, which is also provided MSB first.
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part. This clock input
is also used as the clock source for the AD7910/AD7920 conversion process.
No Connect.
Rev. C | Page 9 of 24
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