Rev. 1.0
AS6C3216
32M Bits ( 2Mx16 / 4Mx8 Switchable) LOW POWER CMOS SRAM
WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6)
Address
CE#
CE2
LB#,UB#
WE#
Dout
Din
tWC
tAW
tCW
tBW
tAS
tWP
tWHZ
(4)
tWR
TOW
High-Z
(4)
tDW
tDH
Data Valid
WRITE CYCLE 2 (CE# and CE2 Controlled) (1,2,5,6)
Address
CE#
CE2
tWC
tAW
tAS
tCW
tBW
LB#,UB#
WE#
Dout
tWP
tWHZ
(4)
Din
tWR
High-Z
tDW
tDH
Data Valid
Alliance Memory, Inc.
7