CY7C1329H-133AXC(2011) 查看數據表（PDF） - Cypress Semiconductor

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CY7C1329H-133AXC
(Rev.:2011)

2-Mbit (64K x 32) Pipelined Sync SRAM

Cypress Semiconductor 

CY7C1329H

Interleaved Burst Address Table

(MODE = Floating or VDD)

First

Address

A1, A0

00

Second

Address

A1, A0

01

Third

Address

A1, A0

10

01

00

11

10

11

00

11

10

01

Fourth

Address

A1, A0

11

10

01

00

ZZ Mode Electrical Characteristics

Parameter

IDDZZ

tZZS

tZZREC

tZZI

tRZZI

Description

Sleep mode standby current

Device operation to ZZ

ZZ recovery time

ZZ Active to sleep current

ZZ Inactive to exit sleep current

Linear Burst Address Table (MODE = GND)

First

Address

A1, A0

00

01

10

11

Second

Address

A1, A0

01

10

11

00

Third

Address

A1, A0

10

11

00

01

Fourth

Address

A1, A0

11

00

01

10

Test Conditions

ZZ > VDD– 0.2 V

ZZ > VDD – 0.2 V

ZZ < 0.2 V

This parameter is sampled

This parameter is sampled

Min

–

–

2tCYC

–

0

Max

40

2tCYC

–

2tCYC

–

Unit

mA

ns

ns

ns

ns

Document #: 38-05673 Rev. *E

Page 6 of 20

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