CY7C1340G 查看數據表（PDF） - Cypress Semiconductor

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CY7C1340G

4-Mbit (128K x 32) Pipelined DCD Sync SRAM

Cypress Semiconductor 

CY7C1340G

Capacitance[10]

Parameter

Description

CIN

CCLK

CI/O

Input Capacitance

Clock Input Capacitance

Input/Output Capacitance

Thermal Characteristics[10]

Parameter

ΘJA

ΘJC

Description

Thermal Resistance (Junction to Ambient)

Thermal Resistance (Junction to case)

Test Conditions

TA = 25°C, f = 1 MHz,

VDD = 3.3V

VDDQ = 3.3V

100 TQFP

Max.

Unit

5

pF

5

pF

5

pF

Test Conditions

100 TQFP

Package

Test conditions follow standard test

methods and procedures for measuring

thermal impedance, per EIA/JESD51.

30.32

6.85

Unit

°C/W

°C/W

AC Test Loads and Waveforms

3.3V I/O Test Load

OUTPUT

Z0 = 50Ω

3.3V

OUTPUT

RL = 50Ω

5 pF

VT = 1.5V

(a)

INCLUDING

JIG AND

SCOPE

R = 317Ω

R = 351Ω

(b)

VDDQ

GND

ALL INPUT PULSES

10%

90%

≤ 1ns

90%

10%

≤ 1ns

(c)

2.5V I/O Test Load

OUTPUT

Z0 = 50Ω

2.5V

OUTPUT

RL = 50Ω

5 pF

VT = 1.25V

R = 1667Ω

R =1538Ω

INCLUDING

(a)

JIG AND

SCOPE

(b)

Note:

10. Tested initially and after any design or process change that may affect these parameters.

VDDQ

GND

ALL INPUT PULSES

10%

90%

≤ 1ns

(c)

90%

10%

≤ 1ns

Document #: 38-05522 Rev. *D

Page 9 of 16

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