IDT71321 查看數據表（PDF） - Integrated Device Technology

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IDT71321

HIGH-SPEED 2K x 16 CMOS DUAL-PORT STATIC RAMS

Integrated Device Technology 

IDT71321SA/LA AND IDT71421SA/LA

HIGH-SPEED 2K x 8 DUAL-PORT STATIC RAM WITH INTERRUPTS

COMMERCIAL TEMPERATURE RANGE

AC ELECTRICAL CHARACTERISTICS OVER THE

OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1)

71321X25

71421X25

71321X35

71421X35

Symbol

Parameter

Min. Max. Min. Max.

Interrupt Timing

tAS

Address Set-up Time

0

—

0—

tWR

Write Recovery Time

0

—

0—

tINS

Interrupt Set Time

—

25

— 25

tINR

Interrupt Reset Time

—

25

— 25

NOTE:

1. "X" in part numbers indicates power rating (S or L).

8M824S25

71321X45

71421X45

Min. Max.

0

—

0

—

—

35

—

35

8M824S308M824S35

71321X55

71421X55

Min. Max. Unit

0

—

ns

0

—

ns

—

45

ns

—

45

ns

2689 tbl 12

TIMING WAVEFORM OF INTERRUPT MODE

SET INT

ADDR'A'

W R/ 'A'

INT'B'

tWC

INTERRUPT ADDRESS (2)

tAS (3)

tWR(4)

tINS (3)

CLEAR INT

ADDR'B'

OE'B'

INT'B'

tRC

INTERRUPT CLEAR ADDRESS

tAS (3)

tINR (3)

NOTES:

1. All timing is the same for left and right ports. Port 'A' may be either left or right port. Port 'B' is the opposite from port 'A'.

2. See Interrupt Truth Table.

3. Timing depends on which enable signal (CE or R/W) is asserted last.

4. Timing depends on which enable signal (CE or R/W) is de-asserted first.

6.03

2691 drw 14

2691 drw 15

10

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