IR3084
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over: 9.5V ≤ VCC ≤ 16V, −0.3V ≤ VOSNS− ≤ 0.3V,
0 oC ≤ TJ ≤ 100 oC, ROSC = 24kΩ, CSS/DEL = 0.1µF ±10%
PARAMETER
TEST CONDITION
MIN TYP MAX UNIT
VDAC REFERENCE
System Set-Point Accuracy
(Deviation from Tables 1 & 2
per test circuit in Figure 1
which emulates in-VR
operation)
Source Current
Sink Current
VIDx Input Threshold
VIDx & VIDSEL Input Bias
Current
VIDx 11111x Blanking Delay
VIDSEL Pull-up Voltage
VIDSEL Pull-up Resistance
VIDSEL VR10/VR11
Threshold
VIDSEL VR11 No Boot
Threshold
VIDSEL VR10 No Boot
Threshold
ERROR AMPLIFIER
Input Offset Voltage
FB Bias Current
VSETPT Bias Current
DC Gain
Gain Bandwidth Product
Corner Frequency
Slew Rate
Source Current
Sink Current
Max Voltage
Min Voltage
VDRP BUFFER AMPLIFIER
Input Offset Voltage
Source Current
Sink Current
Bandwidth (−3dB)
Slew Rate
VID ≥ 1V, 10kΩ≤ROSC≤100kΩ,
25 oC ≤ TJ ≤ 100 oC
0.8V ≤ VID < 1V, 10kΩ≤ROSC≤100kΩ,
25 oC ≤ TJ ≤ 100 oC
0.5V≤VID<0.8V, 10kΩ≤ROSC≤100kΩ,
25 oC ≤ TJ ≤ 100 oC
Includes OCSET and VSETPT currents
Includes OCSET and VSETPT currents
0V ≤ VIDx ≤ VCC
Measure Time till VRRDY drives low,
Note 1
VIDSEL FLOATING
Measure V(FB) – V(VSETPT) per test
circuit in Figure 1. Applies to TBS VID
codes. Note 2.
Note 1
Note 1
45 deg Phase Shift, Note 1
Note 1
VBIAS–VEAOUT (ref. to VBIAS)
Normal operation or Fault mode
V(VDRP) – V(IIN), 0.5V ≤ V(IIN) ≤ 5V
0.5V ≤ V(IIN) ≤ 5V
0.5V ≤ V(IIN) ≤ 5V
Note 1
Note 1
−0.5
−5
−8
104
92
500
−5
0.5
1.15
5.0
0.55
3.0
7.0
−5
−1
48.5
90
6
1.4
−1.2
0.5
150
30
−10
−9
0.2
1
5
0.5
%
+5
mV
+8
mV
113 122
µA
100 108
µA
600
700
mV
0
5
µA
1.3
2.1
µs
1.25 1.35
V
12.5 20.0 KΩ
0.62 0.69
V
3.5
4.0
V
7.5
8.0
V
0.0
−0.3
51
100
10
200
3.2
−0.8
1.0
375
110
5
0.5
53.5
110
400
5
−0.35
1.7
600
200
mV
µA
µA
dB
MHz
Hz
V/µs
mA
mA
mV
mV
−1
6
mV
−7.3
−4
mA
0.88
4.1
mA
6
MHz
10
V/µs
Page 3 of 45
07/20/2005