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M37640E8FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

Mitsumi 

Ver 1.4

MITSUBISHI MICROCOMPUTERS

7640 Group

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

1.18.2 SIO Normal Operation

An internal clock or an external clock can be selected

as the synchronous clock. When the internal clock is

chosen, dividers are built in to provide eight different

clock selections. The start of a transfer is initiated by

a write signal to the SIO shift register (address

002A16). The SRDY signal then drops active low. On

the negative edge of the transfer clock SRDY returns

high and the data is transmitted out the STXD pin.

Data is latched in from the SRXD pin on the rising

edge of the transfer clock. If an internal clock is se-

lected, the STXD pin enters a high-impedance state

after an 8-bit transfer is completed. If an external

clock is selected, the contents of the serial I/O regis-

ter continue to be shifted while the send/receive clock

is being input. Therefore, the clock needs to be con-

trolled by the external source. Also there is no STXD

high-impedance function after data is transferred.

Regardless of whether an internal or external clock is

selected, after an 8-bit transfer, the interrupt request

bit is set. Figure 1.39 shows the timing for the serial I/

O with the LSB-first option selected.

Synchronous Clock

Transfer Clock

SIO Register

Write Signal

Receive Enable

Signal SRDY

SIO Output

SIO Input

See Note

D0 D1 D2 D3 D4 D5 D6 D7

Note:

Interrupt Request Bit Set

When the internal clock is selected, the TxD pin goes into high-

impedance after the data is transferred.

Fig. 1.39. Normal Mode SIO Function Timing (with LSB-First selected)

39

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