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MM74HC595 查看數據表(PDF) - Fairchild Semiconductor

零件编号
产品描述 (功能)
比赛名单
MM74HC595
Fairchild
Fairchild Semiconductor Fairchild
MM74HC595 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Electrical Characteristics
VCC = 2.06.0V, CL = 50pF, tr = tf =6ns unless otherwise specified.
Symbol
Parameter
Conditions
VCC
TA=25°C
TA=-40 to TA=-55
85°C to 125°C Units
Typ.
Guaranteed Limits
2.0V
100
tS
Minimum Setup Time from
SER to SCK
RL=1kΩ, CL=50pF
4.5V
20
6.0V
17
tR
Minimum Removal Time
from SCLR to SCK
2.0V
50
4.5V
10
6.0V
9
tS
Minimum Setup Time from
SCK to RCK
2.0V
100
4.5V
20
6.0V
17
tH
Minimum Hold Time from
SER to SCK
2.0V
5
4.5V
5
6.0V
5
tW
Minimum Pulse Width of
SCK or SCLR
2.0V 30 80
4.5V 9
16
6.0V 8
14
tR,tF
Maximum Input Rise and
Fall Time, Clock
2.0V
4.5V
6.0V
1000
500
400
Maximum Output Rise and
Fall Time QA-QH
tTHL,tTLH
Maximum Output Rise and
Fall Time Q’H
2.0V 25 60
4.5V 7
12
6.0V 6
10
2.0V
75
4.5V
15
6.0V
13
125
25
21
63
13
11
125
25
21
5
5
5
100
20
18
1000
500
400
75
15
13
95
19
16
150
30
ns
25
75
15
ns
13
150
30
ns
26
5
5
ns
5
120
24
ns
22
1000
500
ns
400
90
18
ns
15
110
22
ns
19
Power Dissipation
G=VCC
90
CPD Capacitance, Outputs
pF
Enabled(5)
G=GND
150
CIN Maximum Input Capacitance
5
10
10
10
pF
COUT
Maximum Output
Capacitance
15 20
20
20
pF
Note:
5. CPD determines the no load dynamic power consumption, PD = CPD VCC2f + ICC VCC, and the no load dynamic
current consumption, IS = CPD VCCf + ICC.
© 1983 Fairchild Semiconductor Corporation
MM74HC595 • Rev. 1.0.2
8
www.fairchildsemi.com

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